Overture is the first PC architecture you build in Turing Complete game. In terms of CPU design it represents Harward Architecture (which is…?).

It consists of:

8-bit instructions and registers
External 256 byte instructions memory
No external RAM (you have only registers for that)
4 operation groups
- ALU-related (add, sub, …)
- moving data from/to registers
- comparisons
- jump to instruction N (via writing to r7)
8 registers:
- 6 general use registers (r0..r5)
- Input/output (r6) registers (there are separate input and output 8-bit lanes, but in instructions both input and output have the same name r6; it is always non-ambiguous if input is implied or output)
- Program counter (can be seen as r7)

Overture-based CPU in VCB

Architecture and instructions we will implement below are heavily Overture-based, althouth there are some minor differences here and there. We do not aim to replicate Overture 1-to-1.

Registers:

1
2
3
4
5
6
7
8


    r0  000     General register
    r1  001     General register
    r2  010     General register
    r3  011     General register
    r4  100     General register
    r5  101     General register
    r6  110     May refer to input or output
    r7  111     Program counter

Instruction codes:

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    Read input ("immediate" mode) to r0:

        00AAAAAA    Write AAAAAA to r0

    ALU (reads r1 and r2 as operands, and writes result to r3):

        01...000    AAA OR   BBB 
        01...001    AAA NAND BBB
        01...010    AAA NOR  BBB
        01...011    AAA AND  BBB
        01...100    AAA SUM  BBB (= AAA + BBB)
        01...101    AAA SUB  BBB (= AAA - BBB)
        01...110    -
        01...111    -

    Move (save/load to registers):

        10AAABBB    Write from reg AAA to reg BBB

        examples:
        10001011    Write from r1 to r3
        10011110    Write from r3 to output
        10110111    Write from input to program counter

    Jump (writes r0 to r7/counter if condition for r3 is true):

        11...000    Never
        11...001    Equals 0
        11...010    <0
        11...011    ≤0
        11...100    Always
        11...101    ≠0
        11...110    ≥0
        11...111    >0

Summary of registers used:

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 5
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 7
 8
 9
10
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12
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14
15


    Immediate:

        r0  target (input is written here)

    ALU:

        r1  operand 1
        r2  operand 2
        r3  result

    Jump:

        r0  value to write into counter
        r3  value for condition check
        r8  counter (updated with value from r0)

Architecture 1: Overture-based (8-bit)

Overture-based CPU in VCB